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RT8238B ? ds8238b-00 july 2015 www.richtek.com 1 ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. applications ? notebook computers ? cpu core supply ? chipset/ram supply as low as 0.5v ? generic dc/dc power regulator single synchronous buck pwm controller features ? built in 1% 0.5v reference voltage ? adjustable 0.5v to 3.3v output range ? quick load step response within 100ns ? 4700ppm/ c programmable current limit by low side r ds(on) sensing ? 4.5v to 26v battery input range ? resistor programmable frequency ? internal ramp current limit soft-start control ? drives large synchronous rectifier fets ? integrated boost switch ? over/under voltage protection ? thermal shutdown ? power good indicator ? rohs compliant and halogen free ordering information note : richtek products are : ? rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ? suitable for use in snpb or pb-free soldering processes. pin configurations (top view) wqfn-12l 2x2 general description the RT8238B pwm controller provides high efficiency, excellent transient response, and high dc output accuracy needed for stepping down high voltage batteries to generate low voltage cpu core, i/o, and chipset ram supplies in notebook computers. the constant on-time pwm control scheme handles wide input/output voltage ratios with ease and provides 100ns ? instant-on ? response to load transients while maintaining a relatively constant switching frequency. the RT8238B achieves high efficiency at a reduced cost by eliminating the current sense resistor found in traditional current mode pwms. efficiency is further enhanced by its ability to drive very large synchronous rectifier mosfets and enter diode emulation mode at light load condition. the audio skipping mode (asm) setting maintains the switching frequency above 25khz, which eliminates noise in audio applications. the buck conversion allows this device to directly step down high voltage batteries at the highest possible efficiency. the RT8238B is intended for cpu core, chipset, dram, or other low voltage supplies as low as 0.5v. the RT8238B is available in a wqfn-12l 2x2 package. lgate pgood ugate phase mode en boot vcc fb gnd ton cs 6 5 4 12 10 11 1 2 3 9 8 7 gnd 13 RT8238B package type qw : wqfn-12l 2x2 (w-type) lead plating system g : green (halogen free and pb free) marking information 3y : product code w : date code 3yw
RT8238B 2 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. pin no. pin name pin function 1 lgate gate drive output for low side external mosfet. 2 phase external inductor connection pin for pwm converter. it behaves as the current sense comparator input for low side mosfet r ds(on) sensing and reference voltage for on time generation. 3 ugate gate drive output for high side external mosfet. 4 boot supply input for high side driver. connect through a capacitor to the floating node (phase) pin. 5 vcc control voltage input. provides the power for the buck controller, the low side driver and the bootstrap circuit for high side driver. bypass to gnd with a 1 ? f ceramic capacitor. 6 fb v out feedback input. connect fb to a resistive voltage divider from v out to gnd to adjust the output from 0.5v to 3.3v 7 mode pull down to gnd for forced ccm mode. pull up to 2.5v for audio skipping mode (asm). pull up to 5v for diode emulation mode (dem). 8 en pwm chip enable. pull low to gnd to disable the pwm. 9 pgood open drain power good indicator. high impedance indicates power is good. 10 cs current limit threshold setting input. connect a setting resistor to gnd and the current limit threshold is equal to 1/10 of the voltage at this pin. 11 ton on-time setting. connect a resistor between this pin and v in . 12, 13 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. functional pin description typical application circuit v c c c s u g a t e f b r t 8 2 3 8 b l g a t e b o o t p h a s e m o d e v i n p g o o d p g o o d g n d t o n v d d p r 2 c 2 r t o n q 1 q 2 c 1 1 v en r 6 1 0 0 k 1 f 0 r 4 r 5 c 3 0 0 . 1 f 4 . 5 v t o 2 6 v c 4 1 0 f r 7 * c 7 * r 8 r 9 l 1 c 5 * c 6 * 2 2 0 f 1 0 k 1 0 k * : o p t i o n a l v o u t chip enable t o 5 v : d e m t o 2 . 5 v : a s m t o g n d : f o r c e d - c c m 1 1 5 9 1 0 8 1 2 , 1 3 ( e x p o s e d p a d ) 7 6 1 2 3 4
RT8238B 3 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram min. t off qtrig 1-shot + - comp 0.5v v ref s1 q latch s1 q latch + - ov + - uv 125% v ref 70% v ref + - 125% v ref thermal shutdown dem/fccm /asm drv drv on-time compute 1-shot fb vcc ugate phase pgood gnd lgate ton boot trig en r q s x(-1/10) + - pwm mode + - 90% v ref ss timer por cs vcc phase 10a
RT8238B 4 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. recommended operating conditions (note 4) ? input voltage, v phase ------------------------------------------------------------------------------------------------------ 4.5v to 26v ? control voltage, v cc ------------------------------------------------------------------------------------------------------- 4.5v to 5.5v ? junction temperature range --------------------------------------------------------------------------------------------- ? 40 c to 125 c ? ambient temperature range --------------------------------------------------------------------------------------------- ? 40 c to 85 c absolute maximum ratings (note 1) ? vcc, fb, pgood, en, cs, mode to gnd --------------------------------- ---------------------------------------- ? 0.3v to 6v ? ton to gnd ------------------------------------------------------------------------------------------------------------------- ? 0.3v to 32 v ? boot to phase ------------------------------------------------------------------------------------------------------------ ? 0.3v to 6v ? phase to gnd dc -------------------------------------------------------------------------------------------------------------------------- ----- ? 0.3v to 32v < 20ns ---------------------------------------------------------------------------------------------------------------------- --- ? 8v to 38v ? ugate to phase dc -------------------------------------------------------------------------------------------------------------------------- ----- ? 0.3v to 6v < 20ns ---------------------------------------------------------------------------------------------------------------------- --- ? 5v to 7.5v ? lgate to gnd dc -------------------------------------------------------------------------------------------------------------------------- ----- ? 0.3v to 6v < 20ns ---------------------------------------------------------------------------------------------------------------------- --- ? 2.5v to 7.5v ? power dissipation, p d @ t a = 25 c wqfn-12l 2x2 -------------------------------------------------------------------------------------------------------------- 0. 606w ? package thermal resistance (note 2) wqfn-12l 2x2, ja --------------------------------------------------------------------------------------------------------- 165 c/w ? lead temperature (soldering, 10 sec.) --------------------------------------------------------------------------------- 260 c ? junction temperature ------------------------------------------------------------------------------------------------------- 150 c ? storage temperature range ---------------------------------------------------------------------------------------------- ? 65 c to 150 c ? esd susceptibility (note 3) hbm (human body mode) ------------------------------------------------------------------------------------------------ 2kv mm (ma chine mode) -------------------------------------------------------------------------------------------------------- 200v
RT8238B 5 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. (v cc = 5v, v in = 15v, v en = 5v, v mode = 5v, r ton = 500k , t a = 25 c, unless otherwise specified) electrical characteristics parameter symbol test conditions min typ max unit pwm controller v cc quiescent supply current i q fb forced above the regulation point, v en = 5v -- 0.5 1.25 ma v cc shutdown current i shdn v cc current, v en = 0v -- -- 1 ? a ton operating current r ton = 500k ? -- 30 -- ? a ton shutdown current r ton = 500k ? -- -- 1 ? a cs shutdown current cs pull to gnd -- -- 1 ? a fb error comparator threshold voltage v cc = 4.5 o 5.5v, dem 495 500 505 mv fb input bias current v fb = 0.5v ? 1 0.1 1 ? a output voltage range 0.5 -- 3.3 v on-time v in =15v, v phase = 1.25v, v mode = 0v 267 334 401 ns minimum off-time v mode = 0v, fb = 0.45v 250 400 550 ns current sensing threshold cs source current v cs = 0.5v to 2v 9 10 11 ? a cs source current tc on the basis of 25 ? c -- 4700 -- ppm/ ? c zero crossing threshold v mode >1.8v, phase ?? gnd ? 10 -- 5 mv asm min frequency v mode = 2.5v -- 25 -- khz protection function current limit threshold gnd ?? phase, v cs = 1v 85 100 115 mv uvp threshold uvp detect, fb falling edge 60 70 80 % ovp threshold ovp detect, fb rising edge 120 125 130 % ov fault delay fb forced above ov threshold -- 5 -- ? s v cc power on reset (por) threshold rising edge 3.7 3.9 4.2 v por threshold hysteresis -- 100 -- mv current limit ramp at soft start enable to current limit threshold = 50mv -- 900 -- ? s uv blank time from en signal going high -- 4.5 -- ms thermal shutdown t sd -- 150 -- ? c thermal shutdown hysteresis ? t sd -- 10 -- ? c driver on-resistance ugate driver source r ugatesr boot ? phase forced to 5v, ugate high state -- 2.5 5 ? ugate driver sink r ugatesk boot ?? phase forced to 5v, ugate low state -- 1.5 3 ? lgate driver source r lgatesr lgate high state -- 2.5 5 ? lgate driver sink r lgatesk lgate low state -- 0.8 1.5 ?
RT8238B 6 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit lgate rising (v phase = 1.5v) -- 30 -- dead time ugate rising -- 30 -- ns internal boost charging switch on resistance v cc to boot, 10ma -- -- 80 ? en threshold logic-high v ih 1.2 -- -- enable threshold voltage logic-low v il -- -- 0.4 v mode threshold dem threshold v cc ? 0.5 -- -- v asm threshold 1.8 -- 2.9 v fccm threshold -- -- 0.4 v pgood (upper side threshold decided by ov threshold) trip threshold (falling) measured at fb, with respect to reference ? 13 ? 10 ? 7 % trip threshold hysteresis -- 3 -- % fault propagation delay falling edge, fb forced below pgood trip threshold -- 2.5 -- ? s output low voltage i sink = 1ma -- -- 0.4 v leakage current high state, forced to 5v -- -- 1 ? a note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings, functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a low-effective thermal conductivity test board of jedec 51-3 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT8238B 7 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 load current (a) efficiency (%) v in = 8v, v out = 1v dem mode ccm mode efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 load current (a) efficiency (%) v in = 12v, v out = 1v dem mode ccm mode efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 load current (a) efficiency (%) v in = 20v, v out = 1v dem mode ccm mode switching frequency vs. load current 0 50 100 150 200 250 300 350 400 0.001 0.01 0.1 1 10 load current (a) switching frequency (khz) 1 v in = 12v, v out = 1v dem mode ccm mode switching frequency vs. input voltage 0 50 100 150 200 250 300 350 400 450 500 6 8 10 12 14 16 18 20 22 24 26 input voltage (v) switching frequency (khz) 1 ccm mode, v out = 1v, no load switching frequency vs. r ton resistance 0 100 200 300 400 500 600 700 800 900 100 200 300 400 500 600 700 800 r ton resistance (k ) switching frequency (khz) 1 ccm mode, v in = 12v, v out = 1v, no load
RT8238B 8 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. switching frequency vs. load current 0 50 100 150 200 250 300 350 400 0.001 0.01 0.1 1 10 load current (a) switching frequency (khz) 1 v in = 20v, v out = 1v dem mode ccm mode ovp time (200 s/div) v out (500mv/div) v in = 12v, v out = 1v, no load ugate (20v/div) lgate (5v/div) i l (10a/div) time (20 s/div) uvp v in = 12v, v out = 1v, no load v out (500mv/div) ugate (50v/div) lgate (10v/div) v out (500mv/div) power on from en time (1ms/div) ccm mode, v in = 12v, v out = 1v, no load ugate (20v/div) en (5v/div) pgood (5v/div) power on from en time (1ms/div) v out (500mv/div) dem mode, v in = 12v, v out = 1v, no load ugate (20v/div) en (5v/div) pgood (5v/div) load transient response time (20 s/div) i l (10a/div) ccm mode, v in = 12v, v out = 1v v out (50mv/div) ugate (20v/div) lgate (5v/div)
RT8238B 9 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. mode transition ccm to dem time (1ms/div) mode (5v/div) v in = 12v, v out = 1v, no load v out (200mv/div) ugate (20v/div) lgate (5v/div) mode transition dem to ccm time (1ms/div) mode (5v/div) v in = 12v, v out = 1v, no load v out (200mv/div) ugate (20v/div) lgate (5v/div)
RT8238B 10 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. application information the RT8238B pwm controller provides high efficiency, excellent transient response, and high dc output accuracy needed for stepping down high voltage batteries to generate low voltage cpu core, i/o, and chipset ram supplies in notebook computers. richtek mach response tm technology is specifically designed for providing 100ns ? instant-on ? response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. the topology circumvents the poor load transient timing problems of fixed frequency current mode pwms while avoiding the problems caused by widely varying switching frequencies in conventional constant on-time and constant off-time pwm schemes. the drv tm mode pwm modulator is specifically designed to have better noise immunity for such a single output application. pwm operation the mach response tm drv tm mode controller relies on the output filter capacitor's effective series resistance (esr) to act as a current sense resistor, so the output ripple voltage provides the pwm ramp signal. referring to the function block diagram, the synchronous ugate driver will be turned on at the beginning of each cycle. after the internal one shot timer expires, the ugate driver will be turned off. the pulse width of this one shot is determined by the converter's input voltage and the output voltage to keep the frequency fairly constant over the input voltage range. another one shot sets a minimum off-time (400ns typ.). on-time control the on-time one-shot comparator has two inputs. one input looks at the output voltage, while the other input samples the input voltage and converts it to a current. this input voltage proportional current is used to charge an internal on-time capacitor. the on-time is the time required for the voltage on this capacitor to charge from zero volts to vout, thereby making the on-time of the high side switch directly proportional to the output voltage and inversely proportional to the input voltage. the implementation results in a nearly constant switching frequency without the need of a clock generator. mode selection operation dem (diode emulation mode) and asm (audio skipping mode) operati on can be enabled by driving the tri-state mode pin to a logic high level. the RT8238B can switch operation into dem when the mode pin is pulled up to 5v. if mode is pulled to 2.5v, the controller will switch operation into asm. finally, if the pin is pulled to gnd, the RT8238B will operate in ccm mode. diode emulation mode in diode emulation mode, the RT8238B automatically reduces switching frequency at light load conditions to maintain high efficiency. this reduction of frequency is achieved smoothly and without increasing vout ripple or load regulation. as the output current decreases from heavy load condition, the inductor current is also reduced, and eventually comes to the point that its valley touches zero current, which is the boundary between continuous conduction and discontinuous conduction modes. by emulating the behavior of diodes, the low side mosfet allows only partial of negative current when the inductor freewheeling current reach negative. as the load current is further decreased, it takes longer and longer to discharge the output capacitor to the level than requires the next ? on ? cycle. the on-time is kept the same as that in the heavy load condition. in reverse, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous condition. the transition load point to the light load operation can be calculated as follows (figure 1) : where t on is on-time. ? ? in out load on vv it 2l ? ?? out in on v frequency = vt ? where r ton is the resistor connected from the input supply (v in ) to the ton pin. and then the switching frequency is : ton out on in 8.8p r v t = (v 0.5) ?? ?
RT8238B 11 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 1. boundary condition of ccm/dem the switching waveforms may appear noisy and asynchronous when light loading causes diode emulation operation, but this is a normal operating condition that results in high light load efficiency. trade offs in dem noise vs. light load efficiency is made by varying the inductor value. generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. the disadvantages for using higher inductor values include larger physical size and degrade load transient response (especially at low input voltage levels). audio-skipping mode when the mode pin is pulled to 2.5v, the controller operates in audio skipping mode with a minimum switching frequency of 25khz. this mode eliminates audio-frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. in audio skipping mode, the low side switch gate driver signal is ored with an internal oscillator (>25khz). o nce the internal oscillator is triggered, the audio skipping controller pulls lgate logic high, turning on the low side mosfet to induce a negative inductor current. after the output voltage rises above v ref , the controller turns off the low side mosfet (lgate pulled logic low) and triggers a constant on-time operation (ugate driven logic high). when the on-time operation expires, the controller re- enables the low side mosfet until the inductor current drops below the zero-crossing threshold. forced-ccm mode the low noise, forced-ccm mode (mode = gnd) disables the zero-crossing comparator, which controls the low side switch on-time. this causes the low side gate drive waveform to become the complement of the high side gate drive waveform. this in turn causes the inductor current to reverse at light loads as the pwm loop to maintain a duty ratio v out /v in . the benefit of forced-ccm mode is to keep the switching frequency fairly constant, but it comes at a cost. the no load battery current can be up to 10ma to 40ma, depending on the external mosfets. current limit setting (ocp) the RT8238B has cycle-by-cycle current limiting control. the current limit circuit employs a unique ? valley ? current sensing algorithm. if phase voltage plus the current-limit threshold is below zero, the pwm is not allowed to initiate a new cycle (figure 2). in order to provide both good accuracy and a cost effective solution, the RT8238B supports temperature compensated mosfet r ds(on) sensing. the cs pin should be connected to gnd through the trip voltage setting resistor, r cs . with the 10 a cs terminal source current, i cs , and the setting resistor, r cs the cs trip voltage, v cs , can be calculated as shown in the following equation. v cs (mv) = r cs (k ) x 10 ( a) x (1 / 10) i l t 0 t on slope = (v in -v out ) / l i peak i load = i peak / 2 inductor current is monitored by the voltage between the pgnd pin and the phase pin, so the phase pin should be connected to the drain terminal of the low side mosfet. i cs has positive temperature coefficient to compensate the temperature dependency of the r ds(on) . pgnd is used as the positive current sensing node so pgnd should be connected to the source terminal of the bottom mosfet. as the comparison is done during the off state, v cs sets the valley level of the inductor current. thus, the load current at over current threshold, i load_oc , can be calculated as follows. ?? cs ripple load_oc ds(on) in out out cs ds(on) in vi i = + r2 v v v v 1 = + r2lf v ?? ? ??
RT8238B 12 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. mosfet gate driver (ugate, lgate) the high side driver is designed to drive high current, low r ds(on) n-mosfet (s). when configured as a floating driver, 5v bias voltage is delivered from the vddp supply. the average drive current is proportional to the gate charge at v gs = 5v times switching frequency. the instantaneous drive current is supplied by the flying capacitor between boot and phase pins. a dead time to prevent shoot through is internally generated between high side mosfet off to low side mosfet on and low side mosfet off to high side mosfet on. the low side driver is designed to drive high current, low r ds(on) n-mosfet (s). the internal pull down transistor that drives lgate low is robust, with a 0.8 typical on resistance. a 5v bias voltage is delivered from the vddp supply. the instantaneous drive current is supplied by the flying capacitor between vddp and gnd. for high current applications, some combinations of high and low side mosfets might be encountered that will cause excessive gate drain coupling, which can lead to efficiency killing, emi-producing shoot through currents. this is often remedied by adding a resistor in series with boot, which increases the turn-on time of the high side mosfet without degrading the turn-off time (figure 3). figure 2. valley current-limit figure 3. reducing the ugate rise time boot ugate phase v in power good output (pgood) the power good output is an open drain output and requires a pull-up resistor. when the output voltage is 25% above or 10% below its set voltage, pgood gets pulled low. it is held low until the output voltage returns to within these tolerances once more. in soft-start, pgood is actively held low and is allowed to transition high until soft-start is over and the output reaches 93% of its set voltage. there is a 2.5 s delay built into pgood circuitry to prevent false transitions. por, uvlo and soft-start power o n reset (por) occurs when vcc rises above to approximately 3.9v, the RT8238B will reset the fault latch and preparing the p wm for operation. below 3.7 v (min) , the vcc under voltage lockout (uvlo) circuitry inhibits switching by keeping ugate and lgate low. a built-in soft-start is used to prevent surge current from power supply input after en is enabled. a current ramping up limit threshold can eliminate the v out folded-back in the soft- start duration. the typical soft-start duration is 900 s. output over voltage protection (ovp) the output voltage can be continuously monitored for over voltage protection. when the output voltage exceeds 25% of the set voltage threshold, over voltage protection is triggered and the low side mosfet is latched on. this activates the low side mosfet to discharge the output capacitor. the RT8238B is latched once ovp is triggered and can only be released by vcc or en power-on reset. there is a 5 s delay built into the over voltage protection circuit to prevent false transitions. output under voltage protection (uvp) the output voltage can be continuously monitored for under voltage protection. when the output voltage is less than 70% of the set voltage threshold, under voltage protection is triggered and then both ugate and lgate gate drivers are forced low. during soft-start, the uvp blanking time is 4.5ms. output voltage setting (fb) the output voltage can be adjusted from 0.5v to 3.3v by setting the feedback resistor r1 and r2 (figure 4). choose i l t 0 i lim i peak i load
RT8238B 13 RT8238B-00 july 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. where l ir is the ratio of peak-of-peak ripple current to the maximum average inductor current. find a low pass inductor having the lowest possible dc resistance that fits in the allowed dimensions. ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200khz. the core must be large enough and not to saturate at the peak inductor current (i peak ) : ir peak load(max) load(max) l i = i + i 2 ?? ?? ? ?? ?? ?? ?? output capacitor selection the output filter capacitor must have low enough equivalent series resistance (esr) to meet output ripple and load- transient requirements, yet have high enough esr to satisfy stability requirements. the output capacitance must also be high enough to absorb the inductor energy while transiting from full-load to no-load conditions without tripping the overvoltage fault latch. although mach response tm drv tm dual ramp valley mode provides many advantages such as ease-of-use, minimum external component configuration, and extremely short response time, due to not employing an error amplifier in the loop, a sufficient feedback signal needs to be provided by an external circuit to reduce the jitter level. the required sw esr out f 1 f = 2 esr c 4 ? ?? ? do not put high value ceramic capacitors directly across the outputs without taking precautions to ensure stability. large ceramic capacitors can have a high-esr zero frequency and cause erratic and unstable operation. however, it is easy to add sufficient series resistance by placing the capacitors a couple of inches downstream from the inductor and connecting vout or fb divider close to the inductor. there are two related but distinct ways including double pulsing and feedback loop instability to identify the unstable operation. double pulsing occurs due to noise on the output or because the esr is too low that there is not enough voltage ramp in the output voltage signal. this ? fools ? the error comparator into triggering a new cycle immediately after a 400ns minimum off-time period has expired. double pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. however, it may indicate the possible presence of loop instability, which is caused by insufficient esr. loop instability can result in oscillation at the output after line or load perturbations that can trip the over voltage protection latch or cause the output voltage to fall below the tolerance limit. the easiest method for stability checking is to apply a very zero-to-max load transient and carefully observe the output voltage ripple envelope for overshoot and ringing. it helps to simultaneously monitor the inductor current with ac probe. do not allow more than one ringing cycle after the initial step-response under- or over shoot. out ref r1 v = v 1+ r2 ?? ? ?? ?? where v ref is 0.5v.(typ.) figure 4. setting vout with a resistor-divider output inductor selection the switching frequency (on-time) and operating point (% ripple or lir) determine the inductor value as follows : ? ? on in out ir load(max) tvv l = li ?? ? r2 to be approximately 10k , and solve for r1 using the equation : signal level is approximately 15mv at the comparing point. this generates v ripple = (v out / 0.75) x 15mv at the output node. the output capacitor esr should meet this requirement. output capacitor stability stability is determined by the value of the esr zero relative to the switching frequency. the point of instability is given by the following equation : thermal considerations for continuous operation, do not exceed absolute maximum operation junction temperature. the maximum power dissipation depends on the thermal resistance of phase lgate r1 r2 v out v in ugate fb gnd
RT8238B 14 www.richtek.com RT8238B-00 july 2015 ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. layout considerations layout is very important in high frequency switching converter design. if the layout is designed improperly, the pcb could radiate excessive noise and contribute to the converter instability. the following points must be followed for a proper layout of RT8238B. ? connect a filter capacitor to vcc, 1 f to 4.7 f range is recommended. place the filter capacitor close to the ic. ? keep current limit setting network as close as possible to the ic. routing of the network should avoid coupling to high voltage switching node. ? connections from the drivers to the respective gate of the high side or the low side mosfet should be as short as possible to reduce stray inductance. ? all sensitive analog traces and components such as mode, fb, gnd, en, pgood, cs, vcc, and ton should be placed away from high voltage switching nodes such as phase, lgate, ugate, or boot nodes to avoid coupling. use internal layer (s) as ground plane (s) and shield the feedback trace from power traces and components. ? current sense connections must always be made using kelvin connections to ensure an accurate signal, with the current limit resistor located at the device. ? power sections should connect directly to ground plane (s) using multiple vias as required for current handling (including the chip power ground connections). power components should be placed to minimize loops and reduce losses. figure 5. derating curves for RT8238B packages 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0 255075100125 ambient temperature (c) maximum power dissipation (w) 1 single-layer pcb ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature 125 c, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of RT8238B, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for wqfn- 12l 2x2 packages, the thermal resistance, ja , is 165 c / w on a standard jedec 51-3 single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula: p d(max) = (125 c ? 25 c ) / (165 c w) = 0.606w for wqfn-12l 2x2 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for the RT8238B package, the derating curve in figure 5 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.
RT8238B 15 RT8238B-00 july 2015 www.richtek.com richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. outline dimension symbol dimensions in millimeters dimensions in inches min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 d 1.900 2.100 0.075 0.083 e 1.900 2.100 0.075 0.083 e 0.400 0.016 d2 0.850 0.950 0.033 0.037 e2 0.850 0.950 0.033 0.037 l 0.250 0.350 0.010 0.014 w-type 12l qfn 2x2 package note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options 1 1 2 2

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